1. Field of the Invention
The present invention relates to a MOS capacitor type semiconductor device and a crystal oscillation device using such a device, and more particularly, to a semiconductor device that forms a capacitor in a MOS structure.
2. Description of the Related Art
In recent years, mobile communication equipment such as mobile phones has rapidly been improved, and there has been a demand for various additional functional improvements in the communication equipment such as further reduction in size and operation at higher frequencies. Therefore, there has been a demand for a more compact crystal oscillation device capable of operating at higher frequencies since the frequency of the crystal oscillation device is used as a standard communication frequency.
In order to reduce the size of the crystal oscillation device and to enable the device to carry out high frequency operation, a crystal oscillator must be associated with the oscillation frequency. High frequency operation can be achieved to some extent when an equivalent circuit constant for the crystal oscillator is changed by selecting a crystal orientation for use and when the design of the electrode such as the pitch of electrodes formed on the surface of the crystal and the impedance is changed. However, such change could give rise to a drop in the frequency sensitivity, which leads to degradation in the characteristic, and therefore the drop in the frequency sensitivity must be compensated for by the oscillation circuit portion.
In the oscillation circuit using such a crystal oscillator, in order to allow the high frequency operation to be achieved while solving the problem of the drop in the frequency sensitivity, the minimum and maximum values for the capacitance value that serves as a load for the crystal oscillator are increased, so that the width of frequency change can be increased.
It has been known that the characteristic of the oscillation circuit can be improved by using a capacitor formed by a junction of P and N type semiconductors, a variable capacitor with switchable capacitance (hereinafter referred to as “switching capacitor”) or an additional capacitor such as a MOS capacitor for increasing the width of frequency change.
In order to increase the width of capacitance change in the junction of the P and N type semiconductors, the P and N type carrier concentrations must be changed to change the junction capacitance, but as the concentration difference increases, variations in the absolute capacitance value increase.
Among the above described capacitors, the use of the switching capacitor requires an excessive switching capacitance in order to increase the width of capacitance change, and the switching capacitance value and the area of the switching element must be increased.
When a MOS capacitor is used, the width of change in the capacitance between the electrodes must be increased, and therefore an excessive area is necessary as with the case of the switching capacitor, but the area of the elements can be reduced as compared to the case of using the switching element. However, the high frequency characteristic is degraded.
For example, as shown in FIG. 10, a typical conventional MOS capacitor type semiconductor device includes a silicon substrate (or a well formed on the surface of a silicon substrate) 37, a source region 38 and a drain region 39 having a gate electrode 35 between them, and a back gate 34 with a contact diffusion region 40 therearound. There are a source line 31, a gate line 32, a drain line 33, and a back gate line 34. The potentials between these lines are controlled, so that the capacitance is accumulated and changes at a gate oxide film 36 formed between the gate electrode 35 and the silicon substrate 37.
In a proposed device, in order to improve the overall high frequency characteristic such as the maximum oscillation frequency, a ring-shaped gate electrode is formed on an active region, a drain region is formed in a region on the inner side of the gate electrode in the active region, a source region is formed in a region on the outer side of the gate electrode, and a gate extension line connected to the gate electrode is extended from the top of the source region onto the element isolation region. In this way, a good high frequency characteristic results (see for example Japanese Patent Laid-Open No. H10-214971).
When however a MOS transistor capable of operating at a high frequency corresponding to the maximum oscillation frequency is used to generate a capacitance change between the electrodes, an excessive area is necessary. This is not suitable when a capacitor is used to form an oscillator and could even degrade the oscillator characteristic rather than improving it.
The frequency characteristic of a MOS capacitor type semiconductor device that can be reduced in size and operated at high frequencies is defined as follows depending on the frequency and the structure of electrodes for use.
(1) Using the Capacitance Value Between the Gate and Source (Drain)
The moving distance of electrons as carriers (diffusion length) in the cycle defined by the moving speed of the electrons can be expressed by the following expression:The moving distance of electrons: Ln=sqrt(Dn×τn)where Dn is the diffusion coefficient of holes and τn is the cycle of a frequency for use [s].
When voltage is applied to cause the gate to be positively biased, electrons are supplied from the drain and source, and accumulated at the SiO2/Si interface between the gate oxide film of SiO2 and the substrate of Si. At the time, when the source-drain distance L is large, electrons as minority carriers moving by diffusion cannot reach the central part, and the capacitance value is reduced. More specifically, as can be seen from the result of measuring the capacitance change in response to the change in the gate voltage in FIG. 5, a sufficient sensitivity characteristic is shown about at a frequency of 100 kHz, but the sensitivity characteristic is greatly lowered at about 20 MHz.
This is probably because as the frequency for use is higher, the moving distance is shorter, and electrons do not reach the central part. Therefore, for operation in a high frequency domain, the actual source-drain distance L must be not more than the moving distance Ln of electrons (Ln dependency).
(2) Using the Capacitance Between the Gate and the Back Gate
When voltage is applied to negatively bias the gate, holes are supplied from the electrode of the back gate and accumulated at the SiO2/Si interface.
The moving distance (diffusion length) of holes as carriers in the cycle defined by the moving speed of the holes is expressed by the following expression:The moving distance of holes within one cycle: Wp=sqrt(Dp×τp)where Dp is the diffusion coefficient of electrons, and τp is the cycle of the frequency for use [s].
When the distance between the gate and the back gate, in other words the distance LBG between the gate end and a contact diffusion region 40 for contacting the back gate is large, the moving holes as they diffuse in the back gate do not reach the end, and the capacitance value is small. More specifically, as can be seen from the result of measuring the capacitance change with the back gate when the gate voltage is changed in FIG. 6, a sufficient sensitivity characteristic is shown about at a frequency of 100 kHz, but the sensitivity characteristic is greatly lowered at a high frequency of 20 MHz.
More specifically, when the frequency for use is higher, the moving distance is shorter, and the holes do not reach the gate end. Therefore, for high frequency operation, the actual distance LBG between the gate and the back gate must be equal to or less than the moving distance Wp of holes (Wp dependency).